Zephyr PS GPIO Driver Support

This page gives an overview of the PS GPIO Zephyr driver which is available as part of the zephyr-amd repo.

HW Features

  • PS/PMC GPIO Controller

Design Notes

  • To run testcase(tests/drivers/gpio/gpio_basic_api/) we need specific loopback design as shown in the following figure,

Vivado block-design excerpt showing the PS GPIO loopback wiring used by the gpio_basic_api Zephyr testcase: PMCX_GPIO_o / PMCX_GPIO_t are routed through a Slice and Concat back into PMCX_GPIO_i, with a Constant tying the unused input.

PS GPIO loopback wiring required by the gpio_basic_api test.

Implementation

Features Supported

  • Input/output interrupt support.

  • separate call back configuration for each pin.

  • support both level and edge trigger interrupt.

Missing Features

  • Does not support get_pin_configure.

  • Does not support port_get_direction.

Known Issues

  • N/A

Limitations

  • Provide the bank number along with the pin number.

Kernel Configuration

CONFIG_GPIO=y
CONFIG_GPIO_XLNX_PS=y
CONFIG_GPIO_GET_DIRECTION=y
CONFIG_GPIO_GET_CONFIG=y
CONFIG_GPIO_ENABLE_DISABLE_INTERRUPT=y

Device Tree

PS GPIO Node

psgpio: gpio@f19d0000 {
        compatible = "xlnx,ps-gpio";
        status = "disabled";
        reg = <0xf19d0000 0x1000>;
        interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL
                        IRQ_DEFAULT_PRIORITY>;
        interrupt-names = "irq_0";

        #address-cells = <1>;
        #size-cells = <0>;

        psgpio_bank0: psgpio_bank@0 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x0>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <26>;
                status = "okay";
        };

        psgpio_bank3: psgpio_bank@3 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x3>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
                status = "okay";
        };
};

PMC GPIO Node

psgpio: gpio@f1020000 {
        compatible = "xlnx,ps-gpio";
        status = "disabled";
        reg = <0xf1020000 0x1000>;
        interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL
                        IRQ_DEFAULT_PRIORITY>;
        interrupt-names = "irq_0";

        #address-cells = <1>;
        #size-cells = <0>;

        psgpio_bank0: psgpio_bank@0 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x0>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <26>;
                status = "okay";
        };

        psgpio_bank1: psgpio_bank@1 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x1>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <26>;
                status = "okay";
        };

        psgpio_bank3: psgpio_bank@3 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x3>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
                status = "okay";
        };

        psgpio_bank4: psgpio_bank@4 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x4>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
                status = "okay";
        };
};

ZYNQMP GPIO Node

psgpio: gpio@ff0a0000 {
        compatible = "xlnx,ps-gpio";
        status = "disabled";
        reg = <0xff0a0000 0x1000>;
        interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL
                        IRQ_DEFAULT_PRIORITY>;
        interrupt-names = "irq_0";

        #address-cells = <1>;
        #size-cells = <0>;

        psgpio_bank0: psgpio_bank@0 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x0>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <26>;
                status = "okay";
        };

        psgpio_bank1: psgpio_bank@1 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x1>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <26>;
                status = "okay";
        };

        psgpio_bank2: psgpio_bank@2 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x2>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <26>;
                status = "okay";
        };

        psgpio_bank3: psgpio_bank@3 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x3>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
                status = "okay";
        };

        psgpio_bank4: psgpio_bank@4 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x4>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
                status = "okay";
        };

        psgpio_bank5: psgpio_bank@5 {
                compatible = "xlnx,ps-gpio-bank";
                reg = <0x5>;
                gpio-controller;
                #gpio-cells = <2>;
                ngpios = <32>;
                status = "okay";
        };
};
  • Bank node must be a child node of PS/PMC nodes.

Driver Stack Size

  • 3.5 KB

    • txt - 2.3 KB, data - 1.2 KB

Test Platform

  • ZynqMP

Test SoC Architecture

  • RPU - R5 Core

Testing Sequence

  • Build zephyr application for R5 core

    • west build -p -b <board> <sample application path>

  • Run zephyr elf on board

Example Tests

Test Name

Example Source

Description

PS GPIO API

tests/drivers/gpio/gpio_basic_api/

Functionality check and performs interrupt-based test in loopback configuration

Driver code coverage with gpio_api_1pin - xlnx_gpio_ps.c - 100%
xlnx_gpio_ps_bank.c - 98 %

Expected Output

  • west build -p -b kv260_r5 zephyr/tests/drivers/gpio/gpio_basic_api/ -DDTC_OVERLAY_FILE=boards/kv260_r5.overlay

Note: To run this test without any error needs specific design configuration and node label must be fixed as psgpio/psgpio_bank<x>

kv260 R5 PS GPIO test log
*** Booting Zephyr OS build xilinx_v2024.2-9-g8f81c04d5091 ***
Running TESTSUITE after_flash_gpio_config_trigger
===================================================================
START - test_gpio_config_trigger
Open drain not supported.
 SKIP - test_gpio_config_trigger in 0.047 seconds
===================================================================
START - test_gpio_config_twice_trigger
Open drain not supported.
 SKIP - test_gpio_config_twice_trigger in 0.047 seconds
===================================================================
TESTSUITE after_flash_gpio_config_trigger succeeded
Running TESTSUITE gpio_port
===================================================================
START - test_gpio_port
Validate device psgpio_bank@3
Check psgpio_bank@3 output 0 connected to input 1
OUT 0 to IN 1 linkage works

bits_physical

pin_physical

check_raw_output_levels

check_logic_output_levels

check_input_levels

bits_logical

check_pulls


pull-up not supported
 PASS - test_gpio_port in 0.478 seconds
===================================================================
TESTSUITE gpio_port succeeded
Running TESTSUITE gpio_port_cb_mgmt
===================================================================
START - test_gpio_callback_add_remove
callback_2 triggered: 1
callback_1 triggered: 1
callback_2 triggered: 1
 PASS - test_gpio_callback_add_remove in 3.738 seconds
===================================================================
START - test_gpio_callback_enable_disable
callback_2 triggered: 1
callback_1 triggered: 1
callback_2 triggered: 1
callback_1 triggered: 1
 PASS - test_gpio_callback_enable_disable in 3.781 seconds
===================================================================
START - test_gpio_callback_self_remove
callback_remove_self triggered: 1
callback_1 triggered: 1
callback_1 triggered: 1
 PASS - test_gpio_callback_self_remove in 2.653 seconds
===================================================================
TESTSUITE gpio_port_cb_mgmt succeeded
Running TESTSUITE gpio_port_cb_vari
===================================================================
START - test_gpio_callback_variants
callback triggered: 1
OUT init a0001, IN cfg 3400000, cnt 1
callback triggered: 1
OUT init 60000, IN cfg 5400000, cnt 1
callback triggered: 1
OUT init 60000, IN cfg 5c00000, cnt 1
callback triggered: 1
OUT init a0001, IN cfg 3c00000, cnt 1
callback triggered: 1
callback triggered: 2
callback triggered: 3
OUT init 60000, IN cfg 4400000, cnt 3
callback triggered: 1
callback triggered: 2
callback triggered: 3
OUT init a0001, IN cfg 2400000, cnt 3
callback triggered: 1
callback triggered: 2
callback triggered: 3
OUT init 60000, IN cfg 4c00000, cnt 3
callback triggered: 1
callback triggered: 2
callback triggered: 3
OUT init a0001, IN cfg 2c00000, cnt 3
callback triggered: 1
callback triggered: 2
OUT init a0001, IN cfg 7400000, cnt 2
 PASS - test_gpio_callback_variants in 11.219 seconds
===================================================================
TESTSUITE gpio_port_cb_vari succeeded

------ TESTSUITE SUMMARY START ------

SUITE SKIP -   0.00% [after_flash_gpio_config_trigger]: pass = 0, fail = 0, skip = 2, total = 2 duration = 0.094 seconds

SKIP - [after_flash_gpio_config_trigger.test_gpio_config_trigger] duration = 0.047 seconds

SKIP - [after_flash_gpio_config_trigger.test_gpio_config_twice_trigger] duration = 0.047 seconds

SUITE PASS - 100.00% [gpio_port]: pass = 1, fail = 0, skip = 0, total = 1 duration = 0.478 seconds

PASS - [gpio_port.test_gpio_port] duration = 0.478 seconds

SUITE PASS - 100.00% [gpio_port_cb_mgmt]: pass = 3, fail = 0, skip = 0, total = 3 duration = 10.172 seconds

PASS - [gpio_port_cb_mgmt.test_gpio_callback_add_remove] duration = 3.738 seconds

PASS - [gpio_port_cb_mgmt.test_gpio_callback_enable_disable] duration = 3.781 seconds

PASS - [gpio_port_cb_mgmt.test_gpio_callback_self_remove] duration = 2.653 seconds

SUITE PASS - 100.00% [gpio_port_cb_vari]: pass = 1, fail = 0, skip = 0, total = 1 duration = 11.219 seconds

PASS - [gpio_port_cb_vari.test_gpio_callback_variants] duration = 11.219 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION SUCCESSFUL

Download zephyr_kv260_r5_ps_gpio.log

Performance Metric

  • TBA

Mainline Status

  • Mainlined

Driver Source Path

  • drivers/gpio/gpio_xlnx_ps_bank.c

Misra C Report

  • Per coding guidelines of zephyr

Misra-c

driver file

kernel utility

Actual violation

4.6

11

0

11

4.8

7

5

2

1.2

16

16

0

10.1

10

0

10

10.3

2

0

2

10.4

68

0

68

10.5

14

0

14

12.1

1

1

0

12.2

3

3

0

14.4

5

0

5

15.5

5

0

5

15.7

2

0

2

20.10

6

6

0

21.1

2

0

2

21.2

35

33

2

5.9

3

3

0

8.4

2

2

0

8.6

2

2

0

8.7

4

4

0

Total

198

75

123