kv260_r5.dts
1/*
2 * Copyright (c) 2022 Linaro.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 */
7
8/dts-v1/;
9#include <arm/xilinx/zynqmp_rpu.dtsi>
10
11/ {
12 model = "KV260 Cortex-R5";
13 compatible = "xlnx,zynqmp-r5";
14
15 chosen {
16 zephyr,sram = &sram0;
17 zephyr,flash = &flash0;
18 zephyr,console = &uart1;
19 zephyr,shell-uart = &uart1;
20 zephyr,ocm = &ocm;
21 };
22
23 aliases {
24 eeprom-0 = &eeprom0;
25 eeprom-1 = &eeprom1;
26 rtc = &rtc0;
27 };
28
29 i2c_ref_clk: i2c-ref-clk {
30 compatible = "fixed-clock";
31 clock-frequency = <100000000>;
32 #clock-cells = <0>;
33 };
34};
35
36&uart1 {
37 status = "okay";
38 current-speed = <115200>;
39 clock-frequency = <99999901>;
40};
41
42&ttc0 {
43 status = "okay";
44 clock-frequency = <100000000>;
45};
46
47&psgpio {
48 status = "okay";
49};
50
51&rtc0 {
52 status = "okay";
53 clock-frequency = <32767>;
54};
55
56&i2c1 {
57 status = "okay";
58 clocks = <&i2c_ref_clk>;
59 clock-frequency = <400000>;
60
61 eeprom0: eeprom@50 {
62 compatible = "st,24c64", "atmel,at24";
63 reg = <0x50>;
64 size = <DT_SIZE_K(8)>;
65 pagesize = <32>;
66 address-width = <16>;
67 timeout = <5>;
68 read-only;
69 };
70
71 eeprom1: eeprom@51 {
72 compatible = "st,24c64", "atmel,at24";
73 reg = <0x51>;
74 size = <DT_SIZE_K(8)>;
75 pagesize = <32>;
76 address-width = <16>;
77 timeout = <5>;
78 read-only;
79 };
80};
81
82&qspi {
83 status = "okay";
84 clock-frequency = <120000000>;
85
86 flash@0 {
87 compatible = "jedec,spi-nor";
88 reg = <0>; /* Chip select 0 */
89 spi-max-frequency = <1000000>;
90 jedec-id = [20 bb 20]; /* Micron mt25qu512a */
91 size = <DT_SIZE_M(256)>; /* 256MB */
92 spi-tx-bus-width = <4>;
93 spi-rx-bus-width = <4>;
94 partitions {
95 compatible = "fixed-partitions";
96 #address-cells = <1>;
97 #size-cells = <1>;
98
99 storage_partition: partition@0 {
100 label = "storage";
101 reg = <0x00000000 DT_SIZE_M(256)>;
102 };
103 };
104 };
105};