Zephyr UARTPSV Driver Support

This page gives an overview of the UARTPSV Zephyr driver which is available as part of the zephyr-amd repo.

HW Features

Design Notes

  • N/A

Implementation

  • N/A

Features Supported

  • Polled Mode - UART Send/Receive

  • Interrupt Mode - UART Send/Receive

  • APIs supported and verified

    • uart_poll_in - Read a character from the device for input

    • uart_poll_out - Write a character to the device for output

    • uart_fifo_fill - Fill FIFO with data

    • uart_fifo_read - Read data from FIFO

Missing Features

  • TBA

Known Issues

  • N/A

Limitations

  • N/A

Kernel Configuration

CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_USE_RUNTIME_CONFIGURE=y

Device Tree

The uartpsv device tree node:

uart0: uart@f1920000 {
    compatible = "arm,sbsa-uart";
    reg = <0xf1920000 0x4c>;
    status = "disabled";
    interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
    interrupt-names = "irq_0";
    clocks = <&uartclk>;
};

Driver Stack Size

  • uart_pl011.c (polled) - 1.3 KB

  • uart_pl011.c (interrupt) - 2.1 KB

Test Platform

  • versalnet - tenzing2_se9 board

Test SoC Architecture

  • RPU - R52 core - Validated

  • APU - A53 core - Not tested

  • SMP - Switch - Not tested

Testing Sequence

  • Build zephyr application for versalnet

    • west build -p -b versalnet_rpu <sample application path>

  • Run zephyr elf on board

Example Tests

Test Name

Example Source

Description

hello world

samples/hello_world/

Prints “Hello World” on uart console

uart_basic_api

tests/drivers/uart/uart_basic_api/

Performs Ztest which verifies basic uart driver APIs.

Expected Output

The full test log is included below; it can also be downloaded from this page.

versal2_rpu uartpsv test log
*** Booting Zephyr OS build xilinx_v2024.2-4-gf414acdbb396 ***
Hello World! versal2_rpu/versal2_rpu

[1424.620]Done FPD power up.
[1424.669] 24.399 ms for Partition#: 0x5, Size: 17488 Bytes
[1429.606]***********Boot PDI Load: Done*********
[1434.102]233021.914 ms: ROM Time
[1437.075]Total PLM Boot Time
* Booting Zephyr OS build xilinx_v2024.2-4-gf414acdbb396 ***
Running TESTSUITE uart_basic_api
===================================================================
START - test_uart_config_get
This is a configure_get test.

    Assertion failed at WEST_TOPDIR/zephyr/tests/drivers/uart/uart_basic_api/src/test_uart_config.c:78: test_config_get: (ret == 0 is false)
set config error
 FAIL - test_uart_config_get in 0.017 seconds
===================================================================
START - test_uart_configure

    Assertion failed at WEST_TOPDIR/zephyr/tests/drivers/uart/uart_basic_api/src/test_uart_config.c:102: uart_basic_api_test_uart_configure: (ret == TC_PASS) || (ret == TC_SKIP) is false

 FAIL - test_uart_configure in 0.017 seconds
===================================================================
START - test_uart_fifo_fill
This is a FIFO test.
 PASS - test_uart_fifo_fill in 0.501 seconds
===================================================================
START - test_uart_fifo_read
Please send characters to serial console
good
 PASS - test_uart_fifo_read in 6.522 seconds
===================================================================
START - test_uart_poll_in
Please send characters to serial console
very
 PASS - test_uart_poll_in in 2.648 seconds
===================================================================
START - test_uart_poll_out
This is a POLL test.
 PASS - test_uart_poll_out in 0.002 seconds
===================================================================
TESTSUITE uart_basic_api failed.
Running TESTSUITE uart_basic_api_pending
===================================================================
START - test_uart_pending
Please send characters to serial console

 PASS - test_uart_pending in 2.082 seconds
===================================================================
TESTSUITE uart_basic_api_pending succeeded

------ TESTSUITE SUMMARY START ------

SUITE FAIL -  66.67% [uart_basic_api]: pass = 4, fail = 2, skip = 0, total = 6 duration = 9.707 seconds
 - FAIL - [uart_basic_api.test_uart_config_get] duration = 0.017 seconds
 - FAIL - [uart_basic_api.test_uart_configure] duration = 0.017 seconds
 - PASS - [uart_basic_api.test_uart_fifo_fill] duration = 0.501 seconds
 - PASS - [uart_basic_api.test_uart_fifo_read] duration = 6.522 seconds
 - PASS - [uart_basic_api.test_uart_poll_in] duration = 2.648 seconds
 - PASS - [uart_basic_api.test_uart_poll_out] duration = 0.002 seconds

SUITE PASS - 100.00% [uart_basic_api_pending]: pass = 1, fail = 0, skip = 0, total = 1 duration = 2.082 seconds
 - PASS - [uart_basic_api_pending.test_uart_pending] duration = 2.082 seconds

------ TESTSUITE SUMMARY END ------

===================================================================
PROJECT EXECUTION FAILED

Download zephyr_versal2_rpu_uartpsv_testlog.log

Code Coverage

  • With uart ztest, Code Coverage was 38.5% (As SBSA UART shares same driver source file as arm, pl011 UART driver).

Performance Metric

  • N/A

Mainline Status

  • The preceding features are mainlined as of 01-Oct-2024

Driver Source Path

  • drivers/serial/uart_pl011.c

Misra C Report

File

Required

Advisory

uart_pl011.c

112

35

  • Detailed Breakup

misra-c rule
(zephyr guideline)

Severity
Actual File
Violations
Kernel Utility
Violations

Dir 4.6

Advisory

22

0

Dir 4.8

Advisory

0

8

Dir 4.9

Advisory

6

5

Rule 1.2

Advisory

0

6

Rule 2.7

Advisory

1

2

Rule 5.8

Required

1

0

Rule 8.4

Required

1

0

Rule 10.1

Required

34

0

Rule 10.3

Required

23

0

Rule 10.4

Required

14

0

Rule 11.9

Required

2

0

Rule 12.1

Advisory

2

0

Rule 12.4

Advisory

2

0

Rule 13.3

Advisory

2

0

Rule 13.5

Required

13

0

Rule 14.4

Required

8

0

Rule 15.6

Required

2

0

Rule 16.1

Required

4

0

Rule 16.3

Required

4

0

Rule 17.7

Required

2

0

Rule 20.7

Required

4

0

Rule 21.2

Required

0

7

Total violations

147

28